Month: June 2019

My new team of doctors says more chemotherapy is not likely to help much so I am being put into a clinical trial and will be moving home again early this week, using non-chemo drug therapy.  The success rate is higher with this treatment plan and the doctors can tailor it to more aggressively attack the specific cancer cells in my body.

I suspect a lot of time will be spent resting, enjoying family and being out in the sun in our garden, but I am very anxious to get back to building and experimenting in the lab again.  It has probably been more than 30 years since I did not solder anything for a month!

Bob

 

I’ve now been in the hospital for four weeks.  Unfortunately my first round of chemotherapy did not destroy the cancel cells so last night I was moved to the Hospital of the University of Pennsylvania where a more aggressive treatment plan is being set up.  It looks like another 4 to 5 weeks in the hospital, but if this is what it takes to defeat Leukemia, then I’m fine with it.

Separate topic: the web page was showing “Access denied” for a couple days but I found the problem and fixed it this morning.  Bad timing… I’m in the hospital and the web pages went down, that was a bad coincidence.

 

Two weeks ago today I entered the hospital.  I finished a week of chemotherapy several days ago and am now waiting for the unpleasant part of the chemo process to start.  Generally speaking, I feel well although tired and not getting enough exercise.  During the day there is time to write code, plan out future projects, and do a lot of research, but there is no way to have a soldering station here to physically make anything.  My wife will be bringing a KIM Clone when she visits today so at least I can test some code on a real machine.

While this isn’t what I would opt to be doing, I am making the best of my idle time and doing design work and trying some concepts I’d been thinking about for years now.  Over the years I resisted using CPLDs/FPGAs because they just aren’t vintage, but I’ve got a paper design for a small, inexpensive 65C02 board using a CPLD to do all the glue logic.  My Verilog/VHDL skills have gotten rusty so it’s forcing me to re-learn things.

I’ll post updates when there are any, and I do appreciate all the emails received wishing me a speedy recovery!

Bob